Thursday, May 16, 2019

Highlights of Samsung Foundry Forum 2019, Santa Clara, California, USA

3nm Gate-All-Around (GAA) process, 3GAE, development is on track. Process Design Kit (PDK) version 0.1 for 3GAE has been released in April to help customers get an early start on the design work and enable improved design competitiveness along with reduced turnaround time (TAT).

Compared to 7nm technology, Samsung’s 3GAE process is designed to provide up to a 45 percent reduction in chip area with 50 percent lower power consumption or 35 percent higher performance.

Samsung Electronics launched the Samsung Advanced Foundry Ecosystem Cloud (SAFE™-Cloud) program. It will provide customers with a more flexible design environment through collaboration with major public cloud service providers, such as Amazon Web Services (AWS) and Microsoft Azure, as well as leading Electronic Design Automation (EDA) companies, including Cadence and Synopsys.

Samsung’s roadmap includes four FinFET-based processes from 7nm down to 4nm that leverage extreme ultraviolet (EUV) technology as well as 3nm GAA, or MBCFET™. In the 2H of this year, Samsung is scheduled to start the mass production of 6nm process devices and complete the development of 4nm process. The product design of Samsung’s 5nm FinFET process, which was developed in April, is expected to be completed in the 2H of this year and go under mass production in the 1H of 2020.
 

While FinFET structures must modulate the number of fins in a discrete way, MBCFET™ provides greater design flexibility by controlling the nanosheet width. In addition, MBCFET™’s compatibility with FinFET processes means the two can share the same manufacturing technology and equipment, which accelerates process development and production ramp-up. (Samsung.com)
 
Development of the successor to the 28FDS process, 18FDS, and eMRAM with 1Gb capacity will be finished this year.

Source: Samsung (LINK)

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By Abishekkumar Thakur and Jonas Sundqvist

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