There are a number of ways how to track R&D in a technological field besides tracking the number of publications. In the case of ALD you can track the number of delegates visiting the annual International ALD conference. ALD 2016 Ireland had 810 delegates and AVS ALD 2017 in Denver had 950 delegates as far as I know. Since the International ALD conference today has >50% industry delegates this is an indication of a growth in R&D interest from both academics and industry.
You can also look at the annual revenue in sales from ALD wafer processing equipment and here information can be taken from regular updates from Gartner, VLSI Research and the leading ALD OEMS like ASM International who report this in their financial reports. If you plot all those numbers using full range on y-axis into a plot (as a I have done below for 2016 numbers) you can clearly see that ALD R&D and systems sales are growing hand in hand from 2005 until 2016. You can also see that 2009 was a bad year and it took two years for the ALD geeks to recover fully and get back to the ALD conference in numbers. What you can also see is that the ALD System sales went down already one year before (2008) the big crisis...
2016 numbers and forecasts (BALD Engineering AB)
Most of the ALD OEMs have published annual reports now and it seem that 2017 was a stellar year for ALD systems sales.
Another way to track ALD R&D is to look at patent filing. Either you can come up with a set of key words that you think will appear in ALD patents or you can dig into the patent classes and make it a bit easier for you sin too look for trends you don´t necessary need all patents it may just be enough to look for a couple of classes where ALD people are filing.
Last year I compiled this graph below showing ALD precursor patent applications and families and two of the most important events for ALD high-k in high volume manufacturing (HVM) on 300mm wafers using ALD:
- 2004 : ALD of Al2O3/HfO2 high-k node dielectric by Samsung 90 nm DRAM technology
- 2007 : ALD of HfO2 gate dielectric by Intel for their 45 nm Logic High-k/Metal Gate stack
(Until all presentations starts with the DRAM reference as 3 years before Logic, I will keep on repeating this fact. Remember "Memory before Logic")
Since it can take quite some time for patents applications to form actual global families it is more intriguing to track the number of applications. So ta da! it follows the ALD conference delegate number quite good (green curve above).
Summer 2017 patent search (BALD Engineering AB)
So how was 2017 and how many ALD patents are being filed so far 2018 - check it out below and for those of you that have hard time to sleep you can compile this plot on a daily basis by clicking in this LINK. Please note that this graph only contains patent from the CPC class C23C16/45525 and that there are other classes as well that need to be included for a full study. Anyhow it is a good one since it states explicitly Atomic Layer Deposition as coating method. So keep track on the last data point that today is 140 and if it will reach above 671 by the end of the year or not and before that - how many delegates did go to AVS ALD 2018 in Incheon Korea in July!
2018-04-01 patent search (Patbase.com : LINK)
Just recently I met with Prof. Mikko Ritala in Dresden for the EFDS ALD for Industry and I told him that I have a model to predict the number of delegates for ALD Conference 2024 in Helsinki Finland so at this point my recommendation is to book one of these: