ALD News Blog - BALD Engineering
- Harvard University ALD-prepared TiO2 nanofin planar lens for high res imaging
- Fab Equipment Spending Ascending according to SEMI
- Beneq to sponsor & exhibit at Euro CVD - Baltic ALD 2017
- Modular flow and Plasma Electronic from Germany to Exhibit at EuroCVD - Baltic ALD 2017
- Atomic layer deposition for two-dimensional materials (ALDfor2D) workshop
- Lam Research - New Atomic Layer Etching Capability Enables Continued Device Scaling
Posted: 08 Sep 2016 12:05 PM PDT
Researchers at Harvard University have developed a metasurface platform for visible wavelengths based on ALD-prepared TiO2 nanofins. By doing so they can fabricate a metalens for high-resolution imaging with a planar and compact configuration. Fabrication is made by using a simple one-step lithography integration ensures a high-performance and versatile platform that could find many applications in optics, ranging from imaging and spectroscopy to laser-fabrication processes.
Please find here the full story in SPIE Newsroom.
Posted: 08 Sep 2016 11:47 AM PDT
The Fab Equipment Spending is ascending according to a report that SEMI’s Industry Research and Statistics group has published its August update of the World Fab Forecast report.
Fab Equipment Spending by Quarter (SEMI)
The largest growth drivers according to the reporty are 3D NAND and Logic 10nm/7nm for mobile devices and future IoT devices - obviously fully loaded with numerous ALD process steps!
Continue here for the full story.
Posted: 08 Sep 2016 09:36 AM PDT
Fantastic News - We just confirmed that we signed on Finnish ALD and Display Manufacturing Company Beneq as a Gold Sponsor & Exhibitor at Euro CVD - Baltic ALD 2017. Their finacial contribution will help us craete a fanatstic even for the CVD and ALD research and industry communty. Beneq will also have acces to a meeting roome for interaction with their customers & research community.
CVD-ALD bonanza that will take place in Linköping, Sweden 11-14 june, 2017. We will organize a joint EuroCVD-BalticALD meeting over three packed days including a 4th day Tutorial and welcome mixer on Sunday evening.
Sponsorship negotiations at ALD2016 Ireland with Beneq. (Photo Katharina Knaut Fotographie )
Sponsors & Exhibitors
please contact Henrik Pedersen (email@example.com) or Jonas Sundqvist (firstname.lastname@example.org) for sponsoring and to take part in exhibition of this event!
Posted: 08 Sep 2016 09:15 AM PDT
We are very happy to annonc that modular flow and Plasma Electronic from Germany to Exhibit at EuroCVD - Baltic ALD 2017 in Linköping Sweden 11-14 Junde 2017.
Please contatc us if you like to join the exhibition!
Henreik Pedersen (email@example.com)
Jonas Sundqvist (firstname.lastname@example.org)
Posted: 08 Sep 2016 08:49 AM PDT
The aim of this one-day workshop is to give an overview of current topics in the field of atomic layer deposition (ALD) for the synthesis and integration of 2D Materials such as graphene and the transition metal dichalchalcogenides for nanodevice applications. The workshop is geared towards both scientists who work in the field as well as newcomers and technologists who want to get an overview of the field. The workshop is organized in the context of the COST action "HERALD" (MP1402).
Location: Eindhoven, The Netherlands
Registration & more details: http://nanomanufacturing.nl/2DWorkshop/
The workshop is sponsored by
Posted: 06 Sep 2016 02:22 PM PDT
As published by Lam Research : With the introduction of Lam’s latest Flex™ dielectric etch system, we have expanded our atomic layer etching (ALE) portfolio to include both conductor and dielectric etch. At the 10 nm technology node and beyond, conventional technologies do not provide sufficient control for the stringent specifications demanded. As described in our recent announcement , this newest Flex product delivers the atomic-level control needed for manufacturing advanced logic devices and is first in the industry to use dielectric ALE in high-volume production.
Lam Research introduce their latest Flex™ dielectric etch system today! The new product will expand their atomic layer etching (ALE) portfolio to include both conductor and dielectric etch, and is the first in the industry to use dielectric ALE in high-volume production. (Lam Research at LinkedIn)
As logic devices continue to scale, precise and repeatable etching is needed to achieve the required feature characteristics. For example, as transistors get smaller and are packed more closely together, there is less room available for forming and electrically isolating the contact, leading to the adoption of self-aligned contacts (SACs). As a result, contact etch has become one of the most critical processes, directly impacting both wafer yield and transistor performance.
SAC Etch ChallengesGiven the complex and tight geometries involved, the SAC etch process is particularly challenging. Achieving the overall desired results involves optimizing three key tradeoffs. First is corner loss: poor etch selectivity (the rate of removing one material versus another) can lead to unwanted erosion of the spacer film’s corners. Second is pinch-off: polymer chemistries may be used to protect the spacer, but too much polymer can completely pinch off, or block, the contact opening. Third is profile control: polymer buildup at the top of the contact can prevent plasma ions from reaching the bottom, resulting in an undesirable tapered profile (wider at the top than at the bottom).
ALE SolutionLam’s latest ALE process for dielectric films like silicon dioxide (SiO2) delivers the control needed to manage these tradeoffs. Directional (anisotropic) etch and high selectivity enable the contact profile to be shaped accurately without damaging the adjacent spacer. Lam’s ALE process has demonstrated 2x better selectivity versus conventional techniques, providing with lower spacer corner loss regardless of landing area variation.
With ALE, literally a few layers of atoms are removed at a time by using cyclical deposition and removal steps. As a result, ALE provides a level of control that breaks the process tradeoff challenge for SAC and provides enabling capability for other critical dielectric etch applications.
To see how atomic-layer processing works, watch our video, “Building Chips a Few Atoms at a Time.” To learn more about ALE, read our article, “Moving atomic layer etch from lab to fab,” in Solid State Technology.
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